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The C2000 series microcontrollers manufactured by Texas Instruments (hereafter, TI) are good at real-time control, especially digital power supply and brushless DC motor control. Although it is possible to process everything on the main CPU, some models are equipped with a CLA (Control Law Accelerator) to offload some processing (by taking over the processing of the CPU). load can be reduced).
In this article, we will explain what a CLA is.
What is a CLA (Control Law Accelerator)?
CLA is an independent programmable 32-bit floating point arithmetic accelerator.
This accelerator runs at the same frequency as the main CPU. The primary use of the CLA is to handle interrupt service routines, sometimes described as a "mini CPU dedicated to interrupts".
The CPU load can be reduced by offloading the interrupt service routine, which is repeated with every pulse period, from the main CPU to the CLA. This creates room in the CPU, making it possible to improve performance such as switching frequency, or add processing such as communication and self-diagnosis.
List of products equipped with CLA
| Part number | CPU | total throughput (MIPS) |
FPUs Freq (MHz) |
CPU | CLA | RAM (KB) |
Flash (KB) |
ADC*1 | PWM (ch) |
| TMS320F2837x | 1~2 | 800 | Yes | 200 | 1~2 | 204~172 | 1024~512 | 16/12bit, 4 units, 24ch, differential/SE | 24 |
| TMS320F2807x | 1 | 240 | Yes | 120 | 1 | 100 | 512 | 12bit, 3~2 units, 17ch, SE | 24 |
| TMS320F28004x | 1 | 200 | Yes | 100 | 1 | 100 | 256 | 12bit, 3 units, 21~12ch, SE | 16 |
| TMS320F2806x | 1 | 180 | Yes | 90 | 1 | 100 | 128 | 12bit, 1 (2 for S/H), 16~12ch, SE | 17 |
| TMS320F2805x | 1 | 120 | － | 60 | 1 | 20 | 128~64 | 12bit, 1 (2 for S/H), 16ch, SE | 14 |
| TMS320F2803x | 1 | 120 | － | 60 | 1 | 20 | 128~64 | 12bit, 1 unit (2 units for S/H), 16~13ch, SE | 12 |
*1 ADC: Abbreviation for A/D converter
Three features of CLA
1. Feedback control without using CPU
The CLA is independent of the CPU, allowing independent access to control peripherals.
In addition, the CLA has everything necessary for feedback control, such as a 32-bit single-precision floating-point instruction set, trigonometric functions, and an independent bus described later. This allows a fully parallel control loop to run.
2. Interrupt processing can be done immediately
Interrupt processing will begin immediately. Processing time can be shortened by the amount of saving and writing back of registers is unnecessary.
3. Bus independent from CPU can be used
Since the CLA uses its own bus, the CPU can do other things in parallel, such as UART, I2C, PMBus.
Usage example
Typical Use: Offload ADC Interrupt Service Routine
A typical use of the CLA is to offload the ADC interrupt service routine.
For a switching regulator, for example, inputs to the control algorithm include target voltage and current, relative current voltage, current, fault detection, and soft-start counters. It is necessary to repeat this operation without delay, making the next PWM setting from these inputs by the time limit.
However, since the CPU must perform not only the basic operation of the power supply, but also the additional functions of the digital power supply (communications such as UART, I2C, PMBus, bidirectional operation, etc.), the basic operation (routine work) is turned off to the CLA. let it load.
As such, the CLA is a mini CPU that is just right for interrupt service routines. Short but frequent loads can be offloaded from the CPU.
Differentiating between CLA and CPU
We recommend using the CLA for high-bandwidth processing that requires real-time control, and using the CPU for other processing.
Specifically, CLA performs motor and power supply feedback control loops, etc., and the CPU performs background processing such as system diagnosis and communication.
To prevent access contention between CPU and CLA
Since the CLA runs in parallel with the main CPU, many people are concerned about access contention. Although conflicts that lead to failures are avoided in hardware, if one side performs a read-modify-write operation, it is possible that the contents written by the other side will be overwritten.
As a countermeasure in such a case, it is possible to prevent access contention by performing handshake communication or devising a data route.
In addition, there are measures to be taken on the hardware side and arbitration rules when CLA tasks conflict, so they are listed below. Please consider this when developing.
Access contention countermeasures on the hardware side
- Memory (CLA program RAM, CLA data RAM) that fixes access rights to either the CLA or the main CPU
- Simultaneous access possible (ADC reading)
- Put low-priority accesses in wait state in the arbitration circuit (registers such as message RAM and ePWM)
Arbitration rules for conflicting CLA tasks
- If multiple CLA tasks become executable at the same time, the task with the lowest number (task 1) is executed with the highest priority.
- While a CLA task is running, even if a task with higher priority becomes runnable, the running task will run to completion.
CLA Restrictions (Notes)
So far, we have introduced the CLA, but the CLA cannot be used in exactly the same way as the CPU. Please pay attention to the points listed below.
RAM cannot be global
You can use the blocks specified in the datasheet instead of the entire RAM. For details, please refer to the data sheet of each product.
Only registers for feedback control are accessible
Basically, only the following registers can be accessed with CLA. For details, please refer to the data sheet of each product.
| Registers accessible with CLA | Only some products are accessible |
|
|
Limited language support
The language has the following restrictions.
- C++ is not supported.
- Standard C functions cannot be used. However, there are functions necessary for feedback control.
- There is only one stage of function calls.
- A function call can have up to two arguments.
Sample code and related documentation
There is a collection of C2000 microcomputer materials called "C2000Ware". This does not include datasheets and technical reference manuals, but provides the data you need for your PC for evaluation and development. (circuit diagrams, pattern diagrams, software (sample code), drivers, etc.)
In EXE format, all contents will be installed in the following folder.
C:\ti\C2000\C2000Ware_*_**_**_**
Click here to download C2000Ware
Placement of sample code after installation
For example, for the TMS320F2806x series, the folder is as follows.
C:\ti\C2000\C2000Ware_*_**_**_**\device_support\f2806x\docs\
Materials to check first
List of sample code and instructions.
C:\ti\C2000\C2000Ware_*_**_**_**\device_support\f2806x\docs\F2806x_DEV_USER_GUIDE.pdf
Of the sample codes, this is the simplest one written in C.
The main CPU soft-starts the CLA, the CLA calculates the determinant of the 3x3 matrix, and the CPU waits for the completion of CLA polling.
C:\ti\c2000\C2000Ware_1_00_03_00\device_support\f2806x\examples\cla\det_3by3
This is the simplest sample code written in assembler.
You can observe the following trigger chain: PWM period -> AD conversion -> log readings with CLA -> clear interrupt in main CPU interrupt service routine.
C:\ti\c2000\C2000Ware_1_00_03_00\device_support\f2806x\examples\c28\cla_adc
Below is a document published on TI's website. Although the material is from 2012, it is written in Japanese and is concise, so it is the most recommended material for developers to read first. See Chapter 10, "CLA (Control Law Accelerator)".
TMS320C2000: An Introduction to Software Development for Piccolo MCUs
Leave routine work to CLA
Considering the marketability of a digital power supply, I think there may be processing that is added to the normal feedback operation, such as communication, CPU timer, and operation mode switching. It must be implemented in such a way that there is no lateness (deadline miss).
In that case, how about offloading part of the interrupt service routine processed by the main CPU to the CLA?
For more information on CLA, please see the documentation here.
TMS320x2803x Piccolo Control Compensator Accelerator (CLA) Reference Guide
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