This HLS Getting Started Guide series is a collection of resources and articles for users who are new to the Intel HLS Compiler.

explanation

This document describes a series of workflows using the HLS compiler.

It introduces the environment setup for using the HLS compiler, compilation of sample C source code, emulation and generation of HDL. In addition, we will explain how to import the generated HDL into Quartus® Prime's Platform Designer (formerly Qsys), compile the FPGA design, and check the operation on the development kit.

By going through the contents of the document, you can experience a series of workflows, including preparations for using the HLS compiler and checking the operation on the development kit.

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Workflow you can experience in this material

<Target people>
New to HLS compiler

<Concept>
Experience a series of workflows using the HLS compiler to deepen your understanding.

Document

hls-hg_basic-flow_v1710_r2__1.pdf

"HLS Beginner's Guide - Simple Tutorial" (Document for tool version: v17.1) <Rev.2>

sample

ihc_work__1.zip

Files required for a series of operations (When the ZIP file is decompressed, the files required for a series of operations are generated.)

 

Click here for recommended articles/materials

HLS Compiler for Intel® FPGAs
HLS Compiler Environment Construction (Windows® Edition) 

Articles and resources related to High Level Synthesis

Intel® FPGA Development Flow/FPGA Top Page

Click here for recommended FAQ

FAQs related to High Level Synthesis
Intel® FPGA FAQs